Biography
Satoshi Ohtake received the B.E. degree in computer science from the University of Electro-Communications, Tokyo, Japan, in 1995 and the M.E. and Ph.D. degrees in information science from Nara Institute of Science and Technology, Nara, Japan, in 1997 and 1999, respectively. He was a Research Fellow of the Japan Society for the Promotion of Science from 1998 to 1999. He was an Assistant Professor at the Graduate School of Information Science, Nara Institute of Science and Technology, Nara, Japan from 1999 to 2011 and an Associate Professor at the Faculty of Science and Technology, Oita University, Oita, Japan from 2011 to 2019. Presently, he is a Professor at the Faculty of Science and Technology, Oita University. He was a Visiting Scholar – Honorary Fellow at University of Wisconsin-Madison from 2007 to 2008. He received IEICE Information and System Society 2001 Year Paper Award, IEEE International Workshop on Electronic Design, Test & Applications (DELTA) 2006 Best Paper Award and IEEE Workshop on RTL and High Level Testing 2003, 2005 and 2007 Best Paper Awards. His research interests include VLSI CAD, design for testability, and test pattern generation. Prof. Ohtake is a senior member of IEEE, a member of IEICE and IPSJ.